Many new emerging applications require the use of ultra-low power consumption solutions inside a chip. This will allow them to be incorporated into devices that operate from a small non-chargeable battery for very long periods without the need to frequently charge the battery. For example, wearable, mobile and Medical devices which are battery operated may require an ultra-low power solution.
Reducing the operating voltage is the most effective method for power reduction and working at the Near/Sub-threshold voltage domain can save 70-80% from the dynamic power consumption and 80-90% from the leakage power. Near/Sub-threshold technology is a way of operating the CMOS transistors in their weak inversion state where the transistors are never fully turned on. When operating in the Near/Sub-threshold region, the transistor state varies between being fully turned off and partially turned on.
When operating in the Near/Sub-threshold region, transistors operate at a near or lower voltage than their threshold voltage (known as VT) and by such operation the transistor use less power. During Near/Sub-threshold voltage operation, both dynamic power and static power are reduced. Dynamic power is a ratio of the operating voltage by a power of two and the static power at this Sub-threshold voltage domain is also at exponential ratio of the operating voltage, therefore reducing the operating voltage of the device to a Near/Sub-threshold voltage level will reduce the energy per operation dramatically.
One of the major limiting factors for using Near/Sub-threshold technology is the low speed performance of the transistors that goes down in an exponential ratio compared to the voltage drop and due to this limitation the usage of Near/Sub-threshold technology in commercial chips is very limited.
The second limiting factor is the deep sub-micron process variation and the requirement during the design phase to ensure that the device performance is met in the worst case condition of the process. This causes a large overhead during the design and increases area and power dramatically. In today's solutions which try to maximize the maximum achievable speed at worst case conditions, which represent less than 1% of the material in production, a huge overhead is paid in area and power for all the material.
Various methods and implementations for the Near/Sub-threshold technology exist today that focus only on power reduction and not on the optimal way to use this technology for a given power per performance required by a specific application or how to improve the target performance per a given target operating voltage.
In order for this technology to have practical application, a method is required that optimizes power consumption while still meeting the performance requirements for a specific product or application.